1. Field of the Invention
The invention relates in general to a design of semiconductor integrated circuits (ICs), and more particularly to a design of floating non-zero mark which has a good alignment.
2. Description of the Related Art
Photolithography is a critical process in the fabrication of semiconductor devices. Depending on the complexity of the semiconductor device, the number of photoresist depositions and light exposure operations ranges from 10 to 18. Hence, in order to transfer correctly a pattern to a wafer, the photomask must be properly aligned before the photoresist is exposed to light.
In conventional photo-exposure operation, alignment marks must be formed on the silicon wafer so that the alignment marks are able to match with the corresponding marks on the photomask. Alignment marks comprise a zero mark and a floating non-zero mark. Step height of an alignment mark is capable of providing a scattering field or a diffraction edge. When a laser light source, for example, a helium-neon (Hexe2x80x94Ne) laser having a wavelength of 635 nm, shines on the alignment mark, a diffraction pattern is generated. The diffraction pattern can be reflected back and intercepted by an alignment sensor or a first order diffraction interferometer alignment system for recording the positional data.
One kind of alignment marks is formed in a provided substrate by a photolithography and etching process. Since an alignment mark is formed in the substrate, the alignment mark is also called xe2x80x9cZero markxe2x80x9d. The alignment of one layer to the next is accomplished in a stepper. The purpose of the stepper is to transfer a desired pattern situated on a reticle to a layer formed on a wafer. In a typical alignment operation, a wafer, having a zero mark, is coated with a transparent photosensitive material. The stepper utilizes a laser beam to sense the position of a zero mark as a reference point in adjusting the position of the reticle over the wafer to precisely align the reticle to the previous layer on the wafer. The stepper utilizes a laser beam with a fixed wavelength to sense the position of a zero mark on the wafer.
However, after a metal layer is deposited on the wafer, which has been globally planarized, the zero mark for the stepper is no longer visible. That is, the laser beam of the stepper cannot sense the position of the zero mark, since the zero mark is covered by the opaque metal layer. In order to carry out the alignment and patterning of the metal layer, an extra etching step is required to form an opening in the metal layer directly over the zero mark, to thereby recover the visibility of the zero mark. It is appreciated that the conventional etching process often comprises at least one complicated, costly and time-consuming photolithography step.
A non-zero mask is formed on a planarized dielectric layer over a provided substrate. Under the planarized dielectric layer, structures, such as wiring lines, MOS transistors and contacts, have been formed over the substrate, in which structures a zero mark has failed to provide a alignment function. Openings are formed within the dielectric layer. A conductive material is formed to fill the openings while performing a metallization process. Since the conductive material is so dense that light cannot pass through the conductive material and the dielectric layer, such as silicon oxide, is vitreous, the structure used as a zero mark can provide a grating function for alignment.
However, the non-zero mark is formed on a dielectric layer so that a part of exposure light does not only pass through the non-zero mark but also passes through the dielectric layer. Thus, the part of exposure light cannot be reflected to an alignment system. Alignment error is easily formed while using the non-zero mark for alignment.
The invention provides an alignment mark design. Exposure light passing through a non-zero mark can be completely reflected to an alignment system. Alignment error is thereby avoided.
The alignment mark design comprises a metal plateau and a metal material formed over a provided substrate. A first dielectric layer is formed on the substrate. The metal plateau is within the first dielectric layer. A second dielectric layer having openings is formed on the first dielectric layer. The openings are positioned on the metal plateau. The openings within the second dielectric layer are filled with metal material. Exposure light can pass through the second dielectric layer. Since the metal material and the second dielectric layer are alternating, a part of the exposure light passing through the second dielectric layer between sections of the metal material can be reflected into an alignment system by the metal plateau.
Furthermore, the metal plateau comprises three types. A first type is a rectangular plateau which sets a range comprising the metal material. A second type comprises metal slivers which are orthogonal to the metal material. A third type comprises metal slivers which are parallel to the metal material and located under the second dielectric layer between sections of the metal material.